1. Field of the Invention
The present invention relates to a vertical PNP transistor structure for use in integrated circuits.
2. Discussion of the Prior Art
In the integrated circuit art, vertical PNP transistors are well known. Referring to FIGS. 1a and 1b, a conventional vertical PNP transistor is shown formed on a P-type substrate 10 which acts as the collector. An N-type epitaxial layer 12 is grown on top of the substrate 10 and acts as the base. A deep P-type isolation region 14 may be formed in the epitaxial layer 12 extending to the substrate 10 to create an isolated epitaxial "tub" containing the transistor device. A P-type region 16 is formed in the epitaxial layer 12 and acts as the emitter, providing a P-N junction between the emitter 16 and base 12. An N.sup.+ -type region 18 is formed in the epitaxial layer 12 to provide good ohmic contact with the base region.
In such a conventional vertical PNP transistor structure, the effective base is the vertical region of the epitaxial layer 12 located directly below the emitter 16 Because of the physical separation between the base contact 18 and the active base region 12', there is a transverse resistance R between the base contact 18 and the active base region 12' which affects the performance of the device. The value of such resistance increases with distance from the base contact 18. Therefore, there is a voltage drop along the active base region 12' which increases as base drive to the transistor increases.
It is well known in conventional vertical PNP transistor structures that the collector current varies exponentially with the voltage applied to the base, such that a voltage drop of about 60 mV across the active base region 12' causes a ten-fold decrease in collector current. When the base current increases enough to generate a voltage drop in the range of 10-20 mB, the active region 12' becomes less efficient and its contribution to the collector current becomes lower. Thus, at very low levels of base current (microamps range), the entire area under the emitter is efficient and contributes uniformly to the collector current. At higher levels of base current, however, the active region 12' is narrowed down to where the voltage drop is below 20 mV. This phenomenon, called base debiasing, is shown in FIG. 1c and is the reason why the gain of a vertical PNP transistor decreases as base current, and consequently collector, current, increases. Typically, the gain ranges from 100-400 at currents below 1-2 milliamps, but decreases to 10-30 at 10 milliamps. Thus, in a conventional vertical PNP structure, base drive levels of a few microamps have resulted in significant degradation in performance of the transistor and adversely affected the overall gain of the transistor at milliamp levels of collector current.
In another conventional vertical PNP configuration, shown in FIGS. 2a and 2b, the N.sup.+ base contact region 18a fully surrounds an emitter 16a having a larger area than in FIGS. 1a and 1b. Base drive current capability is improved over the structure of FIGS. 1a and 1b, since the distance to the active base region 12' is decreased and the transverse resistance R' is less.
These conventional structures exhibit adequate current gain for small base drive current levels (up to approximately 10 microamps). At higher levels, however, gain decreases rapidly due to the high base resistance. Where higher current levels are required, several vertical PNP transistors have been used in parallel. However, multiple transistors require a large area on the die, rendering such structures costly and less desirable.